Phase 3 core memory substrate
Publish Phase 3 memory ADRs 0060–0061, add ADR-0059 to navigation, and reconcile the phase ADR register and index tables.
Milestone 3.E.4 — ADR Consolidation and Index Update
Status: Complete
Goal: Track E — Exit Gate
Phase: 3 — Core Memory Substrate
Estimated effort: 1 day
Delivered
| Item | Result |
|---|---|
| ADR-0060 | Memory tenant isolation + read-path Tier-1 PII guard (3.E.1) |
| ADR-0061 | HNSW + ranking + write CI regression gates (3.E.3) |
| ADR-0059 | Added to meta.json sidebar (file existed; was not navigable) |
| No new ADR for 3.D.2 / 3.D.3 | Composite scoring v2 → ADR-0053; hot cache → ADR-0059 |
decisions.mdx | Stale Pending/Occupied register replaced with Accepted table |
index.mdx | Key Design Decisions table updated through ADR-0061 |
GDPR org-scope cascade (#641) documented as deferred in ADR-0060 — no standalone ADR until Phase 4.A.2.
Success signals
- ADR-0060 and ADR-0061 published following existing template
- ADR-0059 added to
meta.jsonnavigation - Phase decision log and index reconciled
-
pnpm exec fumadocs-mdxregeneration successful - Markdown lint passes
Prerequisites
- All Track A–D milestones (ADRs document decisions made during implementation)
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